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pin connection 14-pin hermetic dip (y-suffix) 14-pin plastic dip (p-suffix) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a ?n a +in a v+ +in b ?n b out b ?n d +in d v +in c ?n c out c out d 16-pin sol (s-suffix) 1 2 3 4 5 6 7 8 14 13 12 11 10 9 15 16 out a ?n a +in a v+ +in b ?n b out b ?n d +in d v +in c ?n c out c out d nc nc nc = no connect 28-pin lcc (tc-suffix) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 nc +in a nc v+ nc +in b nc nc +in d nc v nc +in c nc nc ?n a out a nc out d ?n d nc nc ?n b out b out c ?n c nc nc nc = no connect rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a low voltage micropower quad operational amplifier op490 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 features single/dual supply operation +1.6 v to +36 v 6 0.8 v to 6 18 v true single-supply operation; input and output voltage ranges include ground low supply current: 80 m a max high output drive: 5 ma min low offset voltage: 0.5 ma max high open-loop gain: 700 v/mv min outstanding psrr: 5.6 m v/v min industry standard quad pinouts available in die form general description the op490 is a high-performance micropower quad op amp that operates from a single supply of +1.6 v to +36 v or from dual supplies of 0.8 v to 18 v. input voltage range includes the negative rail allowing the op490 to accommodate input sig- nals down to ground in single-supply operation. the op490s output swing also includes ground when operating from a single supply, enabling zero-in, zero-out operation. the quad op490 draws less than 20 m a of quiescent supply current per amplifier, but each amplifier is able to deliver over 5 ma of output current to a load. input offset voltage is under 0.5 mv with offset drift below 5 m v/ c over the military tem- perature range. gain exceeds over 700,000 and cmr is better than 100 db. a psrr of under 5.6 m v/v minimizes offset volt- age changes experienced in battery powered systems. the quad op490 combines high performance with the space and cost savings of quad amplifiers. the minimal voltage and current requirements of the op490 makes it ideal for battery and solar powered applications, such as portable instruments and remote sensors.
rev. b C2C (@ v s = 6 1.5 v to 6 15 v, t a = +25 8 c, unless otherwise noted) op490Cspecifications electrical characteristics op490a/e op490f op490g parameter symbol conditions min typ max min typ max min typ max units input offset voltage v os 0.2 0.5 0.4 0.75 0.6 1.0 mv input offset current i os v cm = 0 v 0.4 3 0.4 5 0.4 5 na input bias current i b v cm = 0 v 4.2 15 4.2 20 4.2 25 na large signal voltage a vo v s = 15 v, v o = 10 v gain r l = 100 k w 700 1200 500 1000 400 800 v/mv r l = 10 k w 350 600 250 500 200 400 r l = 2 k w 125 250 100 200 100 200 v+ = 5 v, vC = 0 v, 1 v < v o < 4 v r l = 100 k w 200 400 125 300 100 250 r l = 10 k w 100 180 75 140 70 140 input voltage range ivr v+ = 5 v, vC = 0 v 0/4 0/4 0/4 v v s = 15 v 1 C15/13.5 C15/13.5 C15/13.5 output voltage swing v o v s = 15 v r l = 10 k w 13.5 14.2 13.5 14.2 13.5 14.2 v r l = 2 k w 10.5 11.5 10.5 11.5 10.5 11.5 v oh v+ = 5 v, vC = 0 v r l = 2 k w 4.0 4.2 4.0 4.2 4.0 4.2 v v ol v+ = 5 v, vC = 0 v r l = 10 k w 100 500 100 500 100 500 m v common-mode cmr v+ = 5 v, vC = 0 v, 90 110 80 100 80 100 db rejection 0 v < v cm < 4 v v s = 15 v, 100 130 90 120 90 120 C15 v < v cm < 13.5 v power supply rejection ratio psrr 1.0 5.6 3.2 10 3.2 10 m v/v slew rate sr v s = 15 v 5 12 5 12 5 12 v/ms supply current v s = 1.5 v, no load 40 60 40 60 40 60 m a (all amplifiers) i sy v s = 15 v, no load 60 80 60 80 60 80 capacitive load stability a v = +1 650 650 650 pf input noise voltage e n p-p f o = 0.1 hz to 10 hz 3 3 3 m v p-p v s = 15 v input resistance differential mode r in v s = 15 v 30 30 30 m w input resistance common mode r incm v s = 15 v 20 20 20 g w gain bandwidth product gbwp a v = +1 20 20 20 khz channel separation cs f o = 10 hz 120 150 120 150 120 150 db v o = 20 v p-p v s = 15 v 2 notes 1 guaranteed by cmr test. 2 guaranteed but not 100% tested. specifications subject to change without notice.
op490 rev. b C3C electrical characteristics op490a parameter symbol conditions min typ max units input offset voltage v os 0.4 1.0 mv average input offset voltage drift tcv os v s = 15 v 2 5 m v/ c input offset current i os v cm = 0 v 1.5 5 na input bias current i b v cm = 0 v 4.4 20 na large-signal voltage gain a vo v s = 15 v, v o = 10 v r l = 100 k w 225 400 v/mv r l = 10 k w 125 240 r l = 2 k w 50 110 v+ = 5 v, vC = 0 v, 1 v < v o < 4 v r l = 100 k w 100 200 r l = 10 k w 50 110 input voltage range ivr v+ = 5 v, vC = 0 v 0/3.5 v v s = 15 v 1 C15/13.5 output voltage swing v o v s = 15 v r l = 10 k w 13 13.7 v r l = 2 k w 10 11 v oh v+ = 5 v, vC = 0 v r l = 2 k w 3.9 4.1 v v ol v+ = 5 v, vC = 0 v r l = 10 k w 100 500 m v common-mode rejection cmr v+ = 5 v, vC = 0 v, 0 v < v cm < 3.5 v 85 105 db v s = 15 v, C15 v < v cm < 13.5 v 95 115 power supply rejection ratio psrr 3.2 10 m v/v supply current (all amplifiers) i sy v s = 1.5 v, no load 70 100 m a v s = 15 v, no load 90 120 notes 1 guaranteed by cmr test. specifications subject to change without notice. (@ v s = 6 1.5 v to 6 15 v, C55 8 c t a +125 8 c, unless otherwise noted)
rev. b C4C op490Cspecifications electrical characteristics op490e op490f op490g parameter symbol conditions min typ max min typ max min typ max units input offset voltage v os 0.32 0.8 0.6 1.35 0.8 1.5 mv average input offset voltage drive tcv os v s = 15 v 2 5 4 4 m v/ c input offset current i os v cm = 0 v 0.8 3 1.0 5 1.3 7 na input bias current i b v cm = 0 v 4.4 15 4.4 20 4.4 25 na large signal voltage gain a vo v s = 15 v, v o = 10 v r l = 100 k w 500 800 350 700 300 600 v/mv r l = 10 k w 250 400 175 250 150 250 r l = 2 k w 100 200 75 150 75 125 v+ = 5 v, vC = 0 v, 1 v < v o < 4 v r l = 100 k w 150 280 100 220 80 160 r l = 10 k w 75 140 50 110 40 90 input voltage range ivr v+ = 5 v, vC = 0 v 0/3.5 0/3.5 0/3.5 v v s = 15 v 1 C15/13.5 C15/13.5 C15/13.5 output voltage swing v o v s = 15 v r l = 10 k w 13 14 13 14 13 14 v r l = 2 k w 10 11 10 11 10 11 v oh v+ = 5 v, vC = 0 v r l = 2 k w 3.9 4.1 3.9 4.1 3.9 4.1 v ol v+ = 5 v, vC = 0 v r l = 10 k w 100 500 100 500 100 500 m v common-mode cmr v+ = 5 v, vC = 0 v, 90 110 80 100 80 100 db rejection 0 v < v cm < 3.5 v v s = 15 v, 100 120 90 110 90 110 C15 v < v cm < 13.5 v power supply rejection ratio psrr 1.0 5.6 3.2 10 5.6 17.8 m v/v supply current v s = 1.5 v, no load 65 100 65 100 60 100 m a (all amplifiers) i sy v s = 15 v, no load 80 120 80 120 75 120 notes 1 guaranteed by cmr test. specifications subject to change without notice. simplified schematic (@ v s = 6 1.5 v to 6 15 v, C25 8 c t a +85 8 c for op490e/f, C40 8 c t a +85 8 c for op490g, unless otherwise noted)
op490 rev. b C5C wafer test limits parameter symbol conditions limits units input offset voltage v os 0.75 mv max input offset current i os v cm = 0 v 5 na max input bias current i b v cm = 0 v 20 na max large signal voltage gain a vo v s = 15 v, v o = 10 v r l = 100 k w 500 v/mv min r l = 10 k w 250 v+ = 5 v, vC = 0 v 125 v/mv min 1 v < v o < 4 v, r l = 100 k w input voltage range ivr v+ = 5 v, vC = 0 v 0/4 v min v s = 15 v 1 C15/13.5 output voltage swing v s = 15 v v o r l = 10 k w 13.5 v min r l = 2 k w 10.5 v oh v+ = 5 v, vC = 0 v r l = 2 k w 4.0 v min v ol v+ = 5 v, vC = 0 v r l = 10 k w 500 m v max common-mode rejection cmr v+ = 5 v, vC = 0 v, 0 v < v cm < 4 v 80 db min v s = 15 v, C15 v < v cm < 13.5 v 90 power supply rejection ratio psrr 10 m v/v max supply current (all amplifiers) i sy v s = 15 v, no load 80 m a max notes 1 guaranteed by cmr test. electrical tests are performed at wafer probe to the limits shown. due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. (@ v s = 6 1.5 v to 6 15 v, t a = +25 8 c, unless otherwise noted) absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v differential input voltage . . . . [(vC) C 20 v] to [(v+) + 20 v] common-mode input voltage . [(vC) C 20 v] to [(v+) + 20 v] output short-circuit duration . . . . . . . . . . . . . . .continuous storage temperature range tc, y, p package . . . . . . . . . . . . . . . . . . . C65 c to +150 c operating temperature range op490a . . . . . . . . . . . . . . . . . . . . . . . . . . C55 c to +125 c op490e, op490f . . . . . . . . . . . . . . . . . . . C25 c to +85 c op490g . . . . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c junction temperature (t j ) . . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering, 60 sec) . . . . . . +300 c package type u ja 2 u jc units 14-pin hermetic dip (y) 99 12 c/w 14-pin plastic dip (p) 76 33 c/w 28-contact lcc (tc) 78 30 c/w 16-pin sol (s) 92 27 c/w notes 1 absolute maximum ratings apply to both dice and packaged parts, unless otherwise noted. 2 q ja is specified for worst case mounting conditions, i.e., q ja is specified for device in socket for cerdip, p-dip, and lcc packages; q ja is specified for device soldered to printed circuit board for sol package. ordering guide 1 t a = +25 8 c operating v os max temperature package model (mv) range description op490ay 2 0.5 mil 14-pin cerdip op490atc/883 0.5 mil 28-contact lcc op490ey 0.5 ind 1 4-pin cerdip op490fy 0.75 ind 14- pin c erdip op490gp 1.0 xind 1 4-pin plastic dip op490gs 3 1.0 xind 16-pin sol notes 1 burn-in is available on commercial and industrial temperature range parts in cerdip, plastic dip and to-can packages. 2 for devices processed in total compliance to mil-std-883, add /883 after part number. consult factory for 883 data sheet. 3 for availability and burn-in information on so and plcc packages, contact your local sales office. dice characteristics die size 0.139 0.121 inch, 16,819 sq. mils (3.53 3.07 mm, 10.84 sq. mm)
op490Ctypical performance characteristics rev. b C6C input offset current vs. temperature open-loop gain vs. single-supply voltage output voltage swing vs. load resistance input offset voltage vs. temperature total supply current vs. temperature closed-loop gain vs. frequency input bias current vs. temperature open-loop gain and phase shift vs. frequency output voltage swing vs. load resistance
op490 rev. b C7C power supply rejection vs. frequency current noise density vs. frequency common-mode rejection vs. frequency 10 0% 100? 20mv 100 90 t a = 25 c v s = 15v a v = +1 r l = 10k w c l = 500pf small-signal transient response noise voltage density vs. frequency 10 0% 1ms 5v 100 90 t a = 25 c v s = 15v a v = +1 r l = 10k w c l = 500pf large-signal transient response burn-in circuit
op490 rev. b C8C figure 1. lithium-sulphur dioxide cell discharge charac- teristic with op490 and 100 k w loads requirement of the op490, combined with the flat discharge characteristic of the lithium cell, indicates that the op490 can be operated over the entire useful life of the cell. figure 1 shows the typical discharge characteristic of a 1 ah lithium cell power- ing an op490 with each amplifier, in turn, driving full output swing into a 100 k w load. single-supply output voltage range in single-supply operation the op490s input and output ranges include ground. this allows true zero-in, zero-out operation. the output stage provides an active pull-down to around 0.8 v above ground. below this level, a load resistance of up to 1 m w to ground is required to pull the output down to zero. in the region from ground to 0.8 v the op490 has voltage gain equal to the data sheet specification. output current source ca- pability is maintained over the entire voltage range including ground. input voltage protection the op490 uses a pnp input stage with protection resistors in series with the inverting and noninverting inputs. the high breakdown of the pnp transistors coupled with the protection resistors provides a large amount of input protection, allowing the inputs to be taken 20 v beyond either supply without dam- aging the amplifier. channel separation test circuit applications information battery-powered applications the op490 can be operated on a minimum supply voltage of +1.6 v, or with dual supplies of 0.8 v, and draws only 60 m a of supply current. in many battery-powered circuits, the op490 can be continuously operated for hundreds of hours before re- quiring battery replacement, reducing equipment downtime and operating costs. high performance portable equipment and instruments fre- quently use lithium cells because of their long shelf-life, light weight, and high energy density relative to older primary cells. most lithium cells have a nominal output voltage of 3 v and are noted for a flat discharge characteristic. the low supply current
op490 rev. b C9C micropower voltage-controlled oscillator an op490 in combination with an inexpensive quad cmos switch comprise the precision v co of figure 2. this circuit pro- vides triangle and square wave outputs and draws only 75 m a from a 5 v supply. a acts as an integrator; s1 switches the charging current symmetrically to yield positive and negative ramps. the integrator is bounded by b which acts as a schmitt trigger with a precise hysteresis of 1.67 volts, set by resistors r5, r6, and r7, and associated cmos switches. the resulting out- put of a is a triangle wave with upper and lower levels of 3.33 and 1.67 volts. the output of b is a square wave with almost rail-to-rail swing. with the components shown, frequency of op- eration is given by the equation: f out = v control ( volts ) 10 hz / v but this is easily changed by varying c1. the circuit operates well up to a few hundred hertz. figure 2. micropower voltage controlled oscillator
op490 rev. b C10C micropower single-supply quad voltage-output 8-bit dac the circuit of figure 3 uses the dac8408 cmos quad 8-bit dac, and the op490 to form a single-supply quad voltage-out- put dac with a supply drain of only 140 m a. the dac8408 is used in voltage switching mode and each dac has an output re- sistance ( ? 10 k w ) independent of the digital input code. the output amplifiers act as buffers to avoid loading the dacs. the 100 k w resistors ensure that the op490 outputs will swing be- low 0.8 v when required. figure 3. micropower single-supply quad voltage output 8-bit dac
op490 rev. b C11C figure 4. high output amplifier high output amplifier the amplifier shown in figure 4 is capable of driving 25 v p-p into a 1 k w load. design of the amplifier is based on a bridge configuration. a amplifies the input signal and drives the load with the help of b. amplifier c is a unity-gain inverter which drives the load with help from d. gain of the high output am- plifier with the component values shown is 10, but can easily be changed by varying r1 or r2. single-supply micropower quad programmable gain amplifier the combination of quad op490 and the dac8408 quad 8-bit cmos dac, creates a quad programmable-gain amplifier with a quiescent supply drain of only 140 m a. the digital code present at the dac, which is easily set by a microprocessor, de- termines the ratio between the fixed dac feedback resistor and the resistance of the dac ladder presents to the op amp feed- back loop. gain of each amplifier is: v out v in = 256 n where n equals the decimal equivalent of the 8-bit digital code present at the dac. if the digital code present at the dac con- sists of all zeros, the feedback loop will be open causing the op amp output to saturate. the 10 m w resistors placed in parallel with the dac feedback loop eliminates this problem with a very small reduction in gain accuracy. the 2.5 v reference biases the amplifiers to the center of the linear region providing maximum output swing.
op490 rev. b C12C printed in u.s.a. figure 5. single supply micropower quad programmable gain amplifier

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